IDT77252 |
RFQ for IDT77252 Required Field |
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| Product | Manufacturers | Pack | D/C |
| IDT77252 | - | QFP | - |
The IDT77252 NICStAR™ is a member of IDT's family of products for Asynchronous Transfer Mode (ATM) networks. The ABR SAR performs both the ATM Adaptation Layer (AAL) Segmentation and Reassembly (SAR) function and the ATM layer protocol functions.
A Network Interface Card (NIC) or internetworking product based on the ABR SAR uses host memory, rather than local memory, to reassemble Convergence Sublayer Protocol Data Units (CS-PDUs) from ATM cell payloads received from the network. When transmitting, as CSPDUs become ready, they are queued in host memory and segmentedby the ABR SAR into ATM cell payloads. From this, the ABR SAR then creates complete 53-byte ATM cells which are sent through the network. The ABR SAR's on-chip PCI bus master interface provides efficient, low latency DMA transfers with the host system, while its UTOPIA interface provides direct connection to PHY components used in 25.6 Mbps to 155 Mbps ATM networks.
The IDT77252 is fabricated using state-of-the-art CMOS technology, providing the highest levels of integration, performance and reliability, with the low-power consumption characteristics of CMOS.
Features |
| ` Full-duplex Segmentation and Reassembly (SAR) at 155 Mbps "wire-speed" (310 Mbps aggregate speed)` Operates with ATM Networks up to 155.52 Mbps` Stand-alone Controller: Embedded Processor not required` Performs ATM Layer Protocol Functions` Supports AAL5, AAL3/4, AAL0 and Raw Cell Formats` Supports Constant Bit Rate (CBR), Variable Bit Rate (VBR), and Unassigned Bit Rate (UBR), and Available Bit Rate (ABR) Service Classes` Segments and Reassembles CS-PDUs into Host Memory` Up to 16K Open Transmit Connections` Up to 16K Simultaneous Receive Connections` ABR, VBR, UBR Selectable per VC Time-out` Automatic AAL5 Padding` Four Buffer Pools for Independent or Chained Reassembly` Supports Any Buffer Alignment Condition` Free Buffer Queues Mapped Into PCI Memory Space` Rx FIFO Size (Configurable to 1024 Kbytes)` Configurable Transmit FIFO Depth for Reduced Latency` Supports Big and Little Endian Data Transfers` Null Cell Disable Option During Transmit` NAND Test Mode` RM Cell Handling` UTOPIA Level 1 Interface to PHY` Utility Bus Interface for PHY Management` Serial EEPROM Interface` EPROM Interface` PCI 2.1 Compliant` UNI 3.1, TM 4.0 Compliant` Meets PCI Bus Power Management and Interface Specification Revision 1.1` Pin Compatible with IDT 77211 SAR` Commercial and Industrial Temperature Ranges` 208-Lead PQFP Package (28 x 28mm)` Software Drivers: SARWIN 2 Demonstration Program NDIS Driver Vx Works (3rd party) Linux (3rd party) |
| Symbol | Parmeter | Min | Max | Unit |
| VCC | Supply Voltage | -0.3 | 6.5 | V |
| VIN | Input Voltage | VSS - 0.3 | VCC + 0.3 | V |
| VOUT | Output Voltage | VSS - 0.3 | VCC + 0.3 | V |
| Tstg | Storage Temperature | -55 | 125 | deg.C |
